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VTS
1997
IEEE
96views Hardware» more  VTS 1997»
15 years 2 months ago
Fast Algorithms for Static Compaction of Sequential Circuit Test Vectors
Two fast algorithms for static test sequence compaction are proposed for sequential circuits. The algorithms are based on the observation that test sequences traverse through a sm...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
DAC
1995
ACM
15 years 1 months ago
Extreme Delay Sensitivity and the Worst-Case Switching Activity in VLSI Circuits
Abstract We observe that the switching activity at a circuit node, also called the transition density, can be extremely sensitive to the circuit internal delays. As a result, sligh...
Farid N. Najm, Michael Y. Zhang
ICONIP
2007
14 years 11 months ago
Analog CMOS Circuits Implementing Neural Segmentation Model Based on Symmetric STDP Learning
We proposed a neural segmentation model that is suitable for implementation in analog VLSIs using conventional CMOS technology. The model consists of neural oscillators mutually co...
Gessyca Maria Tovar, Eric Shun Fukuda, Tetsuya Asa...
JCP
2008
118views more  JCP 2008»
14 years 10 months ago
Design of Organic TFT Pixel Electrode Circuit for Active-Matrix OLED Displays
A new current-programming pixel circuit for active-matrix organic light-emitting diode (AM-OLED) displays, composed of four organic thin-film transistors (OTFTs) and one capacitor,...
Aram Shin, Sang Jun Hwang, Seung Woo Yu, Man Young...
ET
2000
145views more  ET 2000»
14 years 9 months ago
Fast Test Pattern Generation for Sequential Circuits Using Decision Diagram Representations
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...
Jaan Raik, Raimund Ubar