1304 search results - page 85 / 261 » Simulation of Soliton Circuits |
VTS
2003
IEEE
15 years 3 months ago
2003
IEEE
Delay faults are an increasingly important test challenge. Traditional open and bridge fault models are incomplete because only the functional fault or a subset of delay fault are...
DATE
2000
IEEE
15 years 2 months ago
2000
IEEE
A novel method which can be regarded as the noisecounterpart of the celebrated Elmore’s delay formula— both being based on the first two moments of the network’s transfer fu...
DATE
1999
IEEE
15 years 2 months ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
ASPDAC
2007
ACM
15 years 2 months ago
2007
ACM
- Two challenges for the accurate prediction of GHz CMOS analog/RF building blocks are presented. Challenging the usage of new compact MOSFET models enhances the simulation accurac...
ISCAS
1995
IEEE
15 years 1 months ago
1995
IEEE
— This paper introduces a simple analytical model for estimating standby and switching power dissipation in deep submicron CMOS digital circuits. The model is based on Berkeley S...