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» Simulation of Soliton Circuits
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DAC
2005
ACM
15 years 22 hour ago
Performance space modeling for hierarchical synthesis of analog integrated circuits
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
ABIALS
2008
Springer
15 years 4 months ago
Neural Pathways of Embodied Simulation
Simulation theories have in recent years proposed that a cognitive agent's "inner world" can at least partly be constituted by internal emulations or simulations of ...
Henrik Svensson, Anthony F. Morse, Tom Ziemke
DAC
2005
ACM
15 years 11 months ago
Power emulation: a new paradigm for power estimation
In this work, we propose a new paradigm called power emulation, which exploits hardware acceleration to drastically speedup power estimation. Power emulation is based on the obser...
Joel Coburn, Srivaths Ravi, Anand Raghunathan
DDECS
2007
IEEE
143views Hardware» more  DDECS 2007»
15 years 4 months ago
Fault Injection and Simulation for Fault Tolerant Reconfigurable Duplex System
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...
Pavel Kubalík, Jirí Kvasnicka, Hana ...
HICSS
1996
IEEE
102views Biometrics» more  HICSS 1996»
15 years 2 months ago
Evaluation of Parallel Logic Simulation Using DVSIM
Parallel simulation is expected to speed up simulation run time in a signi cant way. This paper describes a framework that is used to evaluate the performance of parallel simulati...
Gerd Meister