Sciweavers

273 search results - page 17 / 55
» Simulation of hybrid computer architectures: simulators, met...
Sort
View
134
Voted
HOTI
2005
IEEE
15 years 7 months ago
Hybrid Cache Architecture for High Speed Packet Processing
: The exposed memory hierarchies employed in many network processors (NPs) are expensive in terms of meeting the worst-case processing requirement. Moreover, it is difficult to ef...
Zhen Liu, Kai Zheng, Bin Liu
106
Voted
EUROPAR
2004
Springer
15 years 7 months ago
Modular On-chip Multiprocessor for Routing Applications
Abstract. Simulation platforms for network processing still have difficulties in finding a good compromise between speed and accuracy. This makes it difficult to identify the caus...
Saifeddine Berrayana, Etienne Faure, Daniela Geniu...
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
15 years 6 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
ICCD
2008
IEEE
119views Hardware» more  ICCD 2008»
15 years 10 months ago
Hierarchical simulation-based verification of Anton, a special-purpose parallel machine
—One of the major design verification challenges in the development of Anton, a massively parallel special-purpose machine for molecular dynamics, was to provide evidence that co...
John P. Grossman, John K. Salmon, Richard C. Ho, D...
101
Voted
SAC
2006
ACM
15 years 7 months ago
Evaluation of current architecture frameworks
With the growing importance of enterprise architecture the discussion about how to create or choose the right enterprise architecture framework for a specific organization arose q...
Susanne Leist, Gregor Zellner