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GLVLSI
2007
IEEE
158views VLSI» more  GLVLSI 2007»
14 years 11 months ago
RT-level vector selection for realistic peak power simulation
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang
VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
15 years 10 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...
TSP
2008
179views more  TSP 2008»
14 years 9 months ago
Estimation in Gaussian Graphical Models Using Tractable Subgraphs: A Walk-Sum Analysis
Graphical models provide a powerful formalism for statistical signal processing. Due to their sophisticated modeling capabilities, they have found applications in a variety of fie...
V. Chandrasekaran, Jason K. Johnson, Alan S. Wills...
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DAC
2009
ACM
15 years 4 months ago
Variational capacitance extraction of on-chip interconnects based on continuous surface model
In this paper we present a continuous surface model to describe the interconnect geometric variation, which improves the currently used model for better accuracy while not increas...
Wenjian Yu, Chao Hu, Wangyang Zhang
WSC
2000
14 years 11 months ago
Model abstraction for discrete event systems using neural networks and sensitivity information
STRACTION FOR DISCRETE EVENT SYSTEMS USING NEURAL NETWORKS AND SENSITIVITY INFORMATION Christos G. Panayiotou Christos G. Cassandras Department of Manufacturing Engineering Boston ...
Christos G. Panayiotou, Christos G. Cassandras, We...