Sciweavers

27913 search results - page 118 / 5583
» Simulation
Sort
View
ICCD
2002
IEEE
135views Hardware» more  ICCD 2002»
15 years 10 months ago
Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip
We present a co-simulation environment for multiprocessor architectures, that is based on SystemC and allows a transparent integration of instruction set simulators (ISSs) within ...
Luca Benini, Davide Bertozzi, Davide Bruni, Nicola...
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
15 years 10 months ago
Fast Cycle-accurate Behavioral Simulation for Pipelined Processors Using Early Pipeline Evaluation
Modeling and simulating pipelined processors in procedural languages such as C/C++ requires lots of cost in handling concurrent events, which hinders fast simulation. A number of ...
In-Cheol Park, Se-Hyeon Kang, Yongseok Yi
ICC
2009
IEEE
350views Communications» more  ICC 2009»
15 years 8 months ago
A Performance Comparison of Recent Network Simulators
—A widespread methodology for performance analysis in the field of communication systems engineering is network simulation. While ns-2 has established itself as virtually the st...
Elias Weingärtner, Hendrik vom Lehn, Klaus We...
CSSE
2008
IEEE
15 years 8 months ago
Generation of Executable Representation for Processor Simulation with Dynamic Translation
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...
Jiajia Song, HongWei Hao, Claude Helmstetter, Vani...
SIES
2008
IEEE
15 years 8 months ago
Scalably distributed SystemC simulation for embedded applications
SystemC becomes popular as an efficient system-level modelling language and simulation platform. However, the solethread simulation kernel obstacles its performance progress from ...
Kai Huang, Iuliana Bacivarov, Fabian Hugelshofer, ...