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» Simultaneous Timing Driven Clustering and Placement for FPGA...
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DAC
2006
ACM
15 years 10 months ago
Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction
Field programmable dual-Vdd interconnects are effective to reduce FPGA power. Assuming uniform length interconnects, existing work has developed time slack budgeting to minimize p...
Yu Hu, Yan Lin, Lei He, Tim Tuan
DAC
2005
ACM
15 years 10 months ago
Power-aware placement
Lowering power is one of the greatest challenges facing the IC industry today. We present a power-aware placement method that simultaneously performs (1) activity-based register c...
Yongseok Cheon, Pei-Hsin Ho, Andrew B. Kahng, Sher...
ISAS
2007
Springer
15 years 3 months ago
MDDPro: Model-Driven Dependability Provisioning in Enterprise Distributed Real-Time and Embedded Systems
Service oriented architecture (SOA) design principles are increasingly being adopted to develop distributed real-time and embedded (DRE) systems, such as avionics mission computin...
Sumant Tambe, Jaiganesh Balasubramanian, Aniruddha...
77
Voted
ASPDAC
1998
ACM
101views Hardware» more  ASPDAC 1998»
15 years 1 months ago
An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits
ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
Jinan Lou, Amir H. Salek, Massoud Pedram
81
Voted
IBPRIA
2007
Springer
15 years 3 months ago
Registration-Based Segmentation Using the Information Bottleneck Method
We present two new clustering algorithms for medical image segmentation based on the multimodal image registration and the information bottleneck method. In these algorithms, the h...
Anton Bardera, Miquel Feixas, Imma Boada, Jaume Ri...