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ISQED
2007
IEEE
146views Hardware» more  ISQED 2007»
15 years 11 months ago
Parameter-Variation-Aware Analysis for Noise Robustness
This paper studies the impact of variability on the noise robustness of logic gates using noise rejection curves (NRCs). NRCs allow noise pulses to be modeled using magnitude-dura...
Mosin Mondal, Kartik Mohanram, Yehia Massoud
PLDI
2004
ACM
15 years 10 months ago
Cloning-based context-sensitive pointer alias analysis using binary decision diagrams
This paper presents the first scalable context-sensitive, inclusionbased pointer alias analysis for Java programs. Our approach to context sensitivity is to create a clone of a m...
John Whaley, Monica S. Lam
ISPASS
2007
IEEE
15 years 11 months ago
Cross Binary Simulation Points
Architectures are usually compared by running the same workload on each architecture and comparing performance. When a single compiled binary of a program is executed on many diff...
Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jal...
SC
2000
ACM
15 years 9 months ago
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
D. S. Henty
INFOCOM
2005
IEEE
15 years 10 months ago
Predicting Internet end-to-end delay: a multiple-model approach
This paper presents a novel approach to predict the Internet end-to-end delay using multiple-model (MM) methods. The basic idea of the MM method is to assume the system dynamics c...
Ming Yang, Jifeng Ru, X. Rong Li, Huimin Chen, Anw...