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ISCA
1996
IEEE
130views Hardware» more  ISCA 1996»
15 years 6 months ago
Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors
Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to addres...
Mark Horowitz, Margaret Martonosi, Todd C. Mowry, ...
FM
1997
Springer
258views Formal Methods» more  FM 1997»
15 years 6 months ago
Consistent Graphical Specification of Distributed Systems
: The widely accepted possible benefits of formal methods on the one hand and their minor use compared to informal or graphical description techniques on the other hand have repeat...
Franz Huber, Bernhard Schätz, Geralf Einert
ICCBR
1997
Springer
15 years 6 months ago
Supporting Combined Human and Machine Planning: An Interface for Planning by Analogical Reasoning
Realistic and complex planning situations require a mixed-initiative planning framework in which human and automated planners interact to mutually construct a desired plan. Ideally...
Michael T. Cox, Manuela M. Veloso
SIGMETRICS
1996
ACM
118views Hardware» more  SIGMETRICS 1996»
15 years 6 months ago
Integrating Performance Monitoring and Communication in Parallel Computers
A large and increasing gap exists between processor and memory speeds in scalable cache-coherent multiprocessors. To cope with this situation, programmers and compiler writers mus...
Margaret Martonosi, David Ofelt, Mark Heinrich
116
Voted
USENIX
2008
15 years 4 months ago
Prefetching with Adaptive Cache Culling for Striped Disk Arrays
Conventional prefetching schemes regard prediction accuracy as important because useless data prefetched by a faulty prediction may pollute the cache. If prefetching requires cons...
Sung Hoon Baek, Kyu Ho Park