719 search results - page 101 / 144 » Sizing router buffers |
98
Voted
ACSC
2004
IEEE
15 years 4 months ago
2004
IEEE
Indexes are the key technology underpinning efficient text search. A range of algorithms have been developed for fast query evaluation and for index creation, but update algorithm...
121
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DATE
2004
IEEE
15 years 4 months ago
2004
IEEE
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
106
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ASPDAC
2008
ACM
15 years 2 months ago
2008
ACM
This paper investigates methods for minimizing the impact of process variation on clock skew using buffer and wire sizing. While most papers on clock trees ignore data-path circuit...
103
Voted
ASPDAC
2005
ACM
15 years 2 months ago
2005
ACM
As the minimum feature sizes of VLSI circuits get smaller while the clock frequency increases, the effects of process variations become significant. We propose a UST/DME based ap...
89
Voted
GRAPHICSINTERFACE
2003
15 years 1 months ago
2003
We present an out-of-core mesh decimation algorithm that is able to handle input and output meshes of arbitrary size. The algorithm reads the input from a data stream in a single ...