719 search results - page 106 / 144 » Sizing router buffers |
MICRO
2002
IEEE
15 years 5 days ago
2002
IEEE
There has been much discussion about the best way to combine the benefits of new optical circuit switching technology with the established packet switched Internet. In this paper,...
190
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ISCA
2011
IEEE
14 years 4 months ago
2011
IEEE
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
134
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HOTI
2011
IEEE
14 years 5 days ago
2011
IEEE
Abstract—Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power cons...
109
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HPCA
2006
IEEE
16 years 27 days ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
110
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HPCA
2005
IEEE
16 years 27 days ago
2005
IEEE
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...