719 search results - page 127 / 144 » Sizing router buffers |
101
click to vote
ISCA
2002
IEEE
15 years 5 months ago
2002
IEEE
Increasing the number of instruction queue (IQ) entries in a dynamically scheduled processor exposes more instruction-level parallelism, leading to higher performance. However, in...
89
Voted
HPCC
2009
Springer
15 years 5 months ago
2009
Springer
—Bare PC applications do not use an operating system or kernel. The bare PC architecture avoids buffer copying, minimizes interrupts, uses a single thread of execution for proces...
85
Voted
ICMCS
2000
IEEE
15 years 4 months ago
2000
IEEE
In recent years, the Internet has emerged as an important collaborative platform. Many applications utilize the Internet to provide new kinds of services. Among others, Internet t...
INFOCOM
2000
IEEE
15 years 4 months ago
2000
IEEE
Abstract—In this paper, we describe a receiver based congestion control policy that leverages TCP flow control mechanisms to prioritize mixed traffic loads across access links....
RTSS
1998
IEEE
15 years 4 months ago
1998
IEEE
suitable disk layout and network transmission schedule to minimize allocated resources (buffer size, bandwidth, ..., etc.) with maximum resource utilization. In this paper, the rea...