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» Sizing router buffers
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126
Voted
SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
15 years 6 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
100
Voted
ISCA
2009
IEEE
192views Hardware» more  ISCA 2009»
15 years 7 months ago
A case for bufferless routing in on-chip networks
Buffers in on-chip networks consume significant energy, occupy chip area, and increase design complexity. In this paper, we make a case for a new approach to designing on-chip in...
Thomas Moscibroda, Onur Mutlu
109
Voted
IC
2004
15 years 1 months ago
An Efficient TCP Buffer Tuning Technique Based on Packet Loss Ratio (TBT-PLR)
The existing TCP (Transmission Control Protocol) is known to be unsuitable for a network with the characteristics of high BDP (Bandwidth-Delay Product) because of the fixed small o...
Gi-chul Yoo, Eun-sook Sim, Dongkyun Kim, Taeyoung ...
HPCA
2009
IEEE
16 years 1 months ago
Elastic-buffer flow control for on-chip networks
This paper presents elastic buffers (EBs), an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input virtualchannel b...
George Michelogiannakis, James D. Balfour, William...
86
Voted
ICC
2007
IEEE
145views Communications» more  ICC 2007»
15 years 6 months ago
Click on a Cluster: A Viable Approach to Scale Software-Based Routers
—Extensible software-based routers running on commodity off-the-shelf hardware and open-source operating systems have been motivated by the progress in hardware technologies and ...
Qinghua Ye, Mike H. MacGregor