Sciweavers

719 search results - page 25 / 144
» Sizing router buffers
Sort
View
99
Voted
ISCA
2011
IEEE
258views Hardware» more  ISCA 2011»
14 years 4 months ago
A case for heterogeneous on-chip interconnects for CMPs
Network-on-chip (NoC) has become a critical shared resource in the emerging Chip Multiprocessor (CMP) era. Most prior NoC designs have used the same type of router across the enti...
Asit K. Mishra, Narayanan Vijaykrishnan, Chita R. ...
MAM
2011
259views Communications» more  MAM 2011»
14 years 7 months ago
Asynchronous spatial division multiplexing router
Asynchronous quasi-delay-insensitive (QDI) NoCs have several advantages over their clocked counterparts. Virtual channel (VC) is the most utilized flow control method in asynchro...
Wei Song, Doug Edwards
CN
2002
74views more  CN 2002»
15 years 8 days ago
Dynamic buffer management scheme based on rate estimation in packet-switched networks
Abstract-- While traffic volume of real-time applications is rapidly increasing, current routers do not guarantee minimum QoS values of fairness and they drop packets in random fas...
Jeong-woo Cho, Dong-Ho Cho
83
Voted
CCR
2008
83views more  CCR 2008»
15 years 17 days ago
Stability and fairness of explicit congestion control with small buffers
Rate control protocols that utilise explicit feedback from routers are able to achieve fast convergence to an equilibrium which approximates processor-sharing on a single bottlene...
Frank P. Kelly, Gaurav Raina, Thomas Voice
204
Voted
ICDE
1999
IEEE
150views Database» more  ICDE 1999»
16 years 1 months ago
Managing Distributed Memory to Meet Multiclass Workload Response Time Goals
In this paper we present an online method for managing a goaloriented buffer partitioning in the distributed memory of a network of workstations. Our algorithm implements a feedba...
Arnd Christian König, Markus Sinnwell