719 search results - page 43 / 144 » Sizing router buffers |
77
Voted
SODA
2004
ACM
15 years 1 months ago
2004
ACM
Motivated by the need for maintaining multiple, large queues of data in modern high-performance systems, we study the problem of caching queues in memory under the following simpl...
118
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ASPDAC
2011
ACM
14 years 4 months ago
2011
ACM
– This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This paper assumes static mapping and dynamic scheduling of nodes, which has seve...
107
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ACSAC
2004
IEEE
15 years 4 months ago
2004
IEEE
Many network security problems can be solved in a centralized TCP (CTCP) architecture, in which an organization's edge router transparently proxies every TCP connection betwe...
AHS
2006
IEEE
15 years 6 months ago
2006
IEEE
This paper presents a new approach in realizing Virtual Channels tailored for Network on Chip implementations. The technique makes use of a flow control mechanism based on adaptiv...
124
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ISCA
2007
IEEE
15 years 6 months ago
2007
IEEE
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...