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SIGMETRICS
2005
ACM
110views Hardware» more  SIGMETRICS 2005»
15 years 6 months ago
Empirical evaluation of multi-level buffer cache collaboration for storage systems
To bridge the increasing processor-disk performance gap, buffer caches are used in both storage clients (e.g. database systems) and storage servers to reduce the number of slow di...
Zhifeng Chen, Yan Zhang, Yuanyuan Zhou, Heidi Scot...
116
Voted
ICCCN
2007
IEEE
15 years 6 months ago
Packet Scheduling with Buffer Management for Fair Bandwidth Sharing and Delay Differentiation
Abstract— Packet delay and bandwidth are two important metrics for measuring quality of service (QoS) of Internet services. Traditionally, packet delay differentiation and fair b...
Dennis Ippoliti, Xiaobo Zhou, Liqiang Zhang
ISPASS
2007
IEEE
15 years 6 months ago
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving
We have studied DRAM-level prefetching for the fully buffered DIMM (FB-DIMM) designed for multi-core processors. FB-DIMM has a unique two-level interconnect structure, with FB-DIM...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhan...
ASPLOS
2006
ACM
15 years 6 months ago
Geiger: monitoring the buffer cache in a virtual machine environment
Virtualization is increasingly being used to address server management and administration issues like flexible resource allocation, service isolation and workload migration. In a...
Stephen T. Jones, Andrea C. Arpaci-Dusseau, Remzi ...
121
Voted
HIPC
2009
Springer
14 years 10 months ago
Fast checkpointing by Write Aggregation with Dynamic Buffer and Interleaving on multicore architecture
Large scale compute clusters continue to grow to ever-increasing proportions. However, as clusters and applications continue to grow, the Mean Time Between Failures (MTBF) has redu...
Xiangyong Ouyang, Karthik Gopalakrishnan, Tejus Ga...