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111
Voted
VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
16 years 28 days ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
112
Voted
ISQED
2007
IEEE
165views Hardware» more  ISQED 2007»
15 years 6 months ago
On-Line Adjustable Buffering for Runtime Power Reduction
We present a novel technique to exploit the power-performance tradeoff. The technique can be used stand-alone or in conjunction with dynamic voltage scaling, the mainstream techn...
Andrew B. Kahng, Sherief Reda, Puneet Sharma
INFOCOM
2012
IEEE
13 years 3 months ago
Origin-destination flow measurement in high-speed networks
—An origin-destination (OD) flow between two routers is the set of packets that pass both routers in a network. Measuring the sizes of OD flows is important to many network man...
Tao Li, Shigang Chen, Yan Qiao
89
Voted
INFOCOM
2009
IEEE
15 years 7 months ago
The Crosspoint-Queued Switch
Abstract—This paper calls for rethinking packet-switch architectures by cutting all dependencies between the switch fabric and the linecards. Most single-stage packet-switch arch...
Josef Kanizo, David Hay, Isaac Keslassy
DAC
2009
ACM
15 years 5 months ago
Vicis: a reliable network for unreliable silicon
Process scaling has given designers billions of transistors to work with. As feature sizes near the atomic scale, extensive variation and wearout inevitably make margining unecono...
David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacc...