719 search results - page 75 / 144 » Sizing router buffers |
103
Voted
ISQED
2002
IEEE
15 years 5 months ago
2002
IEEE
This paper introduces a new global-tier interconnect scaling scheme which ensures that inductance effects do not start dominating the overall interconnect performance. It is shown...
EPEW
2006
Springer
15 years 2 months ago
2006
Springer
We consider a finite buffer queue with one deterministic server fed by packets arriving in batches. We assume that we are not able to fully describe the batch distribution: only th...
118
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SIGCOMM
1996
ACM
15 years 4 months ago
1996
ACM
There is much experimental evidence that network traffic processes exhibit ubiquitous properties of self-similarity and long-range dependence, i.e., of correlations over a wide ran...
130
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EUROPAR
2010
Springer
15 years 24 days ago
2010
Springer
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
98
Voted
AINA
2004
IEEE
15 years 4 months ago
2004
IEEE
As the demand for high bandwidth on the Internet increases, it is required to build next generation routers with the capability of forwarding multiple millions of packets per secon...