Sciweavers

11215 search results - page 1770 / 2243
» Skeleton - Easy Simulation System
Sort
View
CODES
2004
IEEE
15 years 10 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis
FPGA
2006
ACM
195views FPGA» more  FPGA 2006»
15 years 9 months ago
An adaptive Reed-Solomon errors-and-erasures decoder
The development of Reed-Solomon (RS) codes has allowed for improved data transmission over a variety of communication media. Although Reed-Solomon decoding provides a powerful def...
Lilian Atieno, Jonathan Allen, Dennis Goeckel, Rus...
CASES
2001
ACM
15 years 9 months ago
A system-on-a-chip lock cache with task preemption support
Intertask/interprocess synchronization overheads may be significant in a multiprocessor-shared memory System-on-a-Chip implementation. These overheads are observed in terms of loc...
Bilge Saglam Akgul, Jaehwan Lee, Vincent John Moon...
ICS
2000
Tsinghua U.
15 years 9 months ago
Compiling object-oriented data intensive applications
Processing and analyzing large volumes of data plays an increasingly important role in many domains of scienti c research. High-level language and compiler support for developing ...
Renato Ferreira, Gagan Agrawal, Joel H. Saltz
CF
2010
ACM
15 years 9 months ago
A communication infrastructure for a million processor machine
: The SpiNNaker machine is a massively parallel computing system, consisting of 1,000,000 cores. From one perspective, it has a place in Flynns' taxonomy: it is a straightforw...
Andrew D. Brown, Steve Furber, Jeff S. Reeve, Pete...
« Prev « First page 1770 / 2243 Last » Next »