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IDEAS
2007
IEEE
135views Database» more  IDEAS 2007»
15 years 6 months ago
Bitmap Index Design Choices and Their Performance Implications
Historically, bitmap indexing has provided an important database capability to accelerate queries. However, only a few database systems have implemented these indexes because of t...
Elizabeth J. O'Neil, Patrick E. O'Neil, Kesheng Wu
INFOCOM
2007
IEEE
15 years 6 months ago
Iterative Scheduling Algorithms
— The input-queued switch architecture is widely used in Internet routers due to its ability to run at very high line speeds. A central problem in designing an input-queued switc...
Mohsen Bayati, Balaji Prabhakar, Devavrat Shah, Ma...
IROS
2007
IEEE
143views Robotics» more  IROS 2007»
15 years 6 months ago
Metrics for quantifying system performance in intelligent, fault-tolerant multi-robot teams
— Any system that has the capability to diagnose and recover from faults is considered to be a fault-tolerant system. Additionally, the quality of the incorporated fault-toleranc...
Balajee Kannan, Lynne E. Parker
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
15 years 6 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
15 years 6 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August