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ECSA
2008
Springer
15 years 2 months ago
Towards a Method for the Evaluation of Reference Architectures: Experiences from a Case
Reference architectures provide major guidelines for the structure of a class of information systems. Because of their fundamental role, reference architectures have to be of high ...
Samuil Angelov, Jos J. M. Trienekens, Paul W. P. J...
DAC
2003
ACM
16 years 1 months ago
A tool for describing and evaluating hierarchical real-time bus scheduling policies
We present a tool suite for building, simulating, and analyzing the results of hierarchical descriptions of the scheduling policy for modules sharing a bus in real-time applicatio...
Trevor Meyerowitz, Claudio Pinello, Alberto L. San...
102
Voted
EMSOFT
2007
Springer
15 years 7 months ago
Slice-balancing H.264 video encoding for improved scalability of multicore decoding
With multicore architectures being introduced to the market, the research community is revisiting problems to evaluate them under the new preconditions set by those new systems. A...
Michael Roitzsch
103
Voted
IJCNN
2006
IEEE
15 years 6 months ago
A Scalable FPGA Implementation of Cellular Neural Networks for Gabor-type Filtering
— We describe an implementation of Gabor-type filters on field programmable gate arrays using the cellular neural network (CNN) architecture. The CNN template depends upon the ...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....
MICRO
2005
IEEE
140views Hardware» more  MICRO 2005»
15 years 6 months ago
Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor
Data prefetching via helper threading has been extensively investigated on Simultaneous MultiThreading (SMT) or Virtual Multi-Threading (VMT) architectures. Although reportedly la...
Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen,...