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DATE
1999
IEEE
74views Hardware» more  DATE 1999»
15 years 9 months ago
FSMD Functional Partitioning for Low Power
Previous work has shown that sizable power reductions can be achieved by shutting down a system's sub-circuits when they are not needed. However, these shutdown techniques fo...
Enoch Hwang, Frank Vahid, Yu-Chin Hsu
139
Voted
ICCAD
1999
IEEE
119views Hardware» more  ICCAD 1999»
15 years 9 months ago
Factoring logic functions using graph partitioning
Algorithmic logic synthesis is usually carried out in two stages, the independent stage where logic minimization is performed on the Boolean equations with no regard to physical p...
Martin Charles Golumbic, Aviad Mintz
FMCAD
1998
Springer
15 years 9 months ago
Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification
We present a new approach to the verification of hardware systems with data dependencies using temporal logic symbolic model checking. As a benchmark we take Tomasulo's algori...
Sergey Berezin, Armin Biere, Edmund M. Clarke, Yun...
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 9 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
PPSN
1992
Springer
15 years 9 months ago
Nonstationary Function Optimization using the Structured Genetic Algorithm
In this paper, we describe the application of a new type of genetic algorithm called the Structured Genetic Algorithm (sGA) for function optimization in nonstationary environments...
Dipankar Dasgupta, Douglas R. McGregor