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ISCA
1997
IEEE
120views Hardware» more  ISCA 1997»
15 years 1 months ago
Run-Time Adaptive Cache Hierarchy Management via Reference Analysis
Improvements in main memory speeds have not kept pace with increasing processor clock frequency and improved exploitation of instruction-level parallelism. Consequently, the gap b...
Teresa L. Johnson, Wen-mei W. Hwu
APLAS
2010
ACM
14 years 7 months ago
Live Heap Space Bounds for Real-Time Systems
Live heap space analyses have so far been concerned with the standard sequential programming model. However, that model is not very well suited for embedded real-time systems, wher...
Martin Kero, Pawel Pietrzak, Johan Nordlander
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
15 years 6 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...
STOC
2004
ACM
150views Algorithms» more  STOC 2004»
15 years 10 months ago
Typical properties of winners and losers in discrete optimization
We present a probabilistic analysis for a large class of combinatorial optimization problems containing, e.g., all binary optimization problems defined by linear constraints and a...
René Beier, Berthold Vöcking
74
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PLDI
2003
ACM
15 years 2 months ago
Predicting whole-program locality through reuse distance analysis
Profiling can accurately analyze program behavior for select data inputs. We show that profiling can also predict program locality for inputs other than profiled ones. Here loc...
Chen Ding, Yutao Zhong