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MICRO
2008
IEEE
72views Hardware» more  MICRO 2008»
15 years 11 months ago
Low-power, high-performance analog neural branch prediction
Shrinking transistor sizes and a trend toward low-power processors have caused increased leakage, high per-device variation and a larger number of hard and soft errors. Maintainin...
Renée St. Amant, Daniel A. Jiménez, ...
FPGA
2003
ACM
156views FPGA» more  FPGA 2003»
15 years 10 months ago
Architectures and algorithms for synthesizable embedded programmable logic cores
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...
Noha Kafafi, Kimberly Bozman, Steven J. E. Wilton
RTSS
1996
IEEE
15 years 9 months ago
Integrated scheduling of multimedia and hard real-time tasks
An integrated platform which is capable of meeting the requirements of both traditional real-time control processing and multimedia processing has enormous potential for accommoda...
Hiroyuki Kaneko, John A. Stankovic, Subhabrata Sen...
RTSS
2000
IEEE
15 years 8 months ago
Efficient Scheduling of Sporadic, Aperiodic, and Periodic Tasks with Complex Constraints
Many industrial applications with real-time demands are composed of mixed sets of tasks with a variety of requirements. These can be in the form of standard timing constraints, su...
Damir Isovic, Gerhard Fohler
CP
2009
Springer
15 years 8 months ago
Constraint-Based Local Search for the Automatic Generation of Architectural Tests
Abstract. This paper considers the automatic generation of architectural tests (ATGP), a fundamental problem in processor validation. ATGPs are complex conditional constraint satis...
Pascal Van Hentenryck, Carleton Coffrin, Boris Gut...