49 search results - page 4 / 10 » Soft error derating computation in sequential circuits |
DAC
2004
ACM
16 years 16 days ago
2004
ACM
Circuits using nano-meter technologies are becoming increasingly vulnerable to signal interference from multiple noise sources as well as radiation-induced soft errors. One way to...
DAC
2006
ACM
16 years 16 days ago
2006
ACM
Due to the shrinking of feature size and reduction in supply voltages, nanoscale circuits have become more susceptible to radiation induced transient faults. In this paper, we pre...
DAC
1998
ACM
16 years 16 days ago
1998
ACM
VLSID
2007
IEEE
15 years 12 months ago
2007
IEEE
Accurate electrical masking modeling represents a significant challenge in soft error rate analysis for combinational logic circuits. In this paper, we use table lookup MOSFET mode...
DATE
2005
IEEE
15 years 5 months ago
2005
IEEE
Soft errors are an increasingly serious problem for logic circuits. To estimate the effects of soft errors on such circuits, we develop a general computational framework based on ...