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ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
16 years 24 days ago
Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
Michael Gschwind
122
Voted
ICCD
2006
IEEE
94views Hardware» more  ICCD 2006»
16 years 23 days ago
Reliability Support for On-Chip Memories Using Networks-on-Chip
— As the geometries of the transistors reach the physical limits of operation, one of the main design challenges of Systems-on-Chips (SoCs) will be to provide dynamic (run-time) ...
Federico Angiolini, David Atienza, Srinivasan Mura...
SOSP
2001
ACM
16 years 22 days ago
Building Efficient Wireless Sensor Networks with Low-Level Naming
In most distributed systems, naming of nodes for low-level communication leveragestopologicallocation(such as node addresses) and is independentof any application. In this paper, ...
John S. Heidemann, Fabio Silva, Chalermek Intanago...
WISEC
2010
ACM
15 years 10 months ago
Automating the injection of believable decoys to detect snooping
We propose a novel trap-based architecture for enterprise networks that detects “silent” attackers who are eavesdropping network traffic. The primary contributions of our work...
Brian M. Bowen, Vasileios P. Kemerlis, Pratap V. P...
CC
2010
Springer
117views System Software» more  CC 2010»
15 years 10 months ago
Punctual Coalescing
Compilers use register coalescing to avoid generating code for copy instructions. For architectures with register aliasing such as x86, Smith, Ramsey, and Holloway (2004) presented...
Fernando Magno Quintão Pereira, Jens Palsbe...