416 search results - page 79 / 84 » Software Code Generation for the RVC-CAL Language |
CC
2009
Springer
15 years 4 months ago
2009
Springer
Software systems typically exploit only a small fraction of the realizable performance from the underlying microprocessors. While there has been much work on hardware-aware optimiz...
85
Voted
CODES
2008
IEEE
15 years 4 months ago
2008
IEEE
Instruction set extensions (ISEs) can accelerate embedded processor performance. Many algorithms for ISE generation have shown good potential; some of them have recently been expa...
79
Voted
LCTRTS
2007
Springer
15 years 3 months ago
2007
Springer
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
LCTRTS
2007
Springer
15 years 3 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
109
Voted
TOSEM
2008
14 years 9 months ago
2008
Modern programs make extensive use of reusable software libraries. For example, a study of a number of large Java applications shows that between 17% and 30% of the classes in tho...