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VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
16 years 4 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
VLSID
2006
IEEE
150views VLSI» more  VLSID 2006»
16 years 4 months ago
A Comprehensive SoC Design Methodology for Nanometer Design Challenges
SoC design methodologies are under constant revision due to adoption of fast shrinking process technologies at nanometer levels. Nanometer process geometries exhibit new complex d...
R. Raghavendra Kumar, Ricky Bedi, Ramadas Rajagopa...
VLSID
2006
IEEE
129views VLSI» more  VLSID 2006»
16 years 4 months ago
A Stimulus-Free Probabilistic Model for Single-Event-Upset Sensitivity
With device size shrinking and fast rising frequency ranges, effect of cosmic radiations and alpha particles known as Single-Event-Upset (SEU), Single-Eventtransients (SET), is a ...
Mohammad Gh. Mohammad, Laila Terkawi, Muna Albasma...
RECOMB
2008
Springer
16 years 4 months ago
Bootstrapping the Interactome: Unsupervised Identification of Protein Complexes in Yeast
Protein interactions and complexes are major components of biological systems. Recent genome-wide applications of tandem affinity purification (TAP) in yeast have increased signifi...
Caroline C. Friedel, Jan Krumsiek, Ralf Zimmer
ICFP
2006
ACM
16 years 4 months ago
Extensible programming with first-class cases
We present language mechanisms for polymorphic, extensible records and their exact dual, polymorphic sums with extensible first-class cases. These features make it possible to eas...
Matthias Blume, Umut A. Acar, Wonseok Chae