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125
Voted
CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
129
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CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
In this paper, we present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology ...
135
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CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
Design of System-on-Chip (SoC) with regular mesh based Network-on-Chip (NoC) consists of mapping processing cores to routers, and routing of the traffic traces on the topology suc...
113
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CODES
2005
IEEE
15 years 9 months ago
2005
IEEE
Networks-on-Chip (NoCs) have been recently proposed as a promising solution to complex on-chip communication problems. The lack of an unified representation of applications and ar...
154
Voted
CODES
1998
IEEE
15 years 7 months ago
1998
IEEE
Systems in the domain of high-performance video signal processing are becoming more and more programmable. We suggest an approach to design such systems that involves measuring, v...