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EUROPAR
2007
Springer
15 years 9 months ago
Delayed Side-Effects Ease Multi-core Programming
Computer systems are increasingly parallel and heterogeneous, while programs are still largely written in sequential languages. The obvious suggestion that the compiler should auto...
Anton Lokhmotov, Alan Mycroft, Andrew Richards
ICCAD
2006
IEEE
146views Hardware» more  ICCAD 2006»
15 years 9 months ago
Cost-aware synthesis of asynchronous circuits based on partial acknowledgement
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
Yu Zhou, Danil Sokolov, Alexandre Yakovlev
CC
2005
Springer
108views System Software» more  CC 2005»
15 years 8 months ago
Task Partitioning for Multi-core Network Processors
Abstract. Network processors (NPs) typically contain multiple concurrent processing cores. State-of-the-art programming techniques for NPs are invariably low-level, requiring progr...
Robert Ennals, Richard Sharp, Alan Mycroft
DAC
1994
ACM
15 years 7 months ago
Synthesis of Instruction Sets for Pipelined Microprocessors
We present a systematic approach to synthesize an instruction set such that the given application software can be efficiently mapped to a parameterized, pipelined microarchitectur...
Ing-Jer Huang, Alvin M. Despain
FPL
2010
Springer
267views Hardware» more  FPL 2010»
15 years 1 months ago
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor
Due to the continuously decreasing cost of FPGAs, they have become a valid implementation platform for SOCs. Typically, a soft core processor implementation is used to execute the ...
Gerald Hempel, Christian Hochberger, Andreas Koch