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CHI
2005
ACM
16 years 6 months ago
prefuse: a toolkit for interactive information visualization
Although information visualization (infovis) technologies have proven indispensable tools for making sense of complex data, wide-spread deployment has yet to take hold, as success...
Jeffrey Heer, Stuart K. Card, James A. Landay
IPPS
2005
IEEE
15 years 12 months ago
User Transparent Parallel Processing of the 2004 NIST TRECVID Data Set
The Parallel-Horus framework, developed at the University of Amsterdam, is a unique software architecture that allows non-expert parallel programmers to develop fully sequential m...
Frank J. Seinstra, Cees Snoek, Dennis Koelma, Jan-...
CCGRID
2003
IEEE
15 years 11 months ago
Preliminary Evaluation of Dynamic Load Balancing Using Loop Re-partitioning on Omni/SCASH
Increasingly large-scale clusters of PC/WS continue to become majority platform in HPC field. Such a commodity cluster environment, there may be incremental upgrade due to severa...
Yoshiaki Sakae, Mitsuhisa Sato, Satoshi Matsuoka, ...
CF
2007
ACM
15 years 10 months ago
Identifying potential parallelism via loop-centric profiling
The transition to multithreaded, multi-core designs places a greater responsibility on programmers and software for improving performance; thread-level parallelism (TLP) will be i...
Tipp Moseley, Daniel A. Connors, Dirk Grunwald, Ra...
ISCAS
1995
IEEE
91views Hardware» more  ISCAS 1995»
15 years 10 months ago
An FPGA Based Reconfigurable Coprocessor Board Utilizing a Mathematics of Arrays
Abstract -- Work in progress at the University of Missouri-Rolla on hardware assists for high performance computing is presented. This research consists of a novel field programmab...
W. Eatherton, J. Kelly, T. Schiefelbein, H. Pottin...