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PEPM
2009
ACM
16 years 12 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
VIS
2005
IEEE
165views Visualization» more  VIS 2005»
16 years 1 months ago
High Dynamic Range Volume Visualization
High resolution volumes require high precision compositing to preserve detailed structures. This is even more desirable for volumes with high dynamic range values. After the high ...
Baoquan Chen, David H. Porter, Minh X. Nguyen, Xia...
DAC
2008
ACM
16 years 26 days ago
Multithreaded simulation for synchronous dataflow graphs
Synchronous dataflow (SDF) has been successfully used in design tools for system-level simulation of wireless communication systems. Modern wireless communication standards involv...
Chia-Jui Hsu, José Luis Pino, Shuvra S. Bha...
DAC
2004
ACM
16 years 25 days ago
A novel approach for flexible and consistent ADL-driven ASIP design
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
Achim Nohl, Gunnar Braun, Hanno Scharwächter,...
DAC
2005
ACM
16 years 25 days ago
Efficient fingerprint-based user authentication for embedded systems
User authentication, which refers to the process of verifying the identity of a user, is becoming an important security requirement in various embedded systems. While conventional...
Pallav Gupta, Srivaths Ravi, Anand Raghunathan, Ni...
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