Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...
The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, da...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
Large, socially-driven Web 2.0 sites such as Facebook and Youtube have seen significant growth in popularity [5, 10]. However, strong demand also exists for socially-driven web s...
Frank Uyeda, Diwaker Gupta, Amin Vahdat, George Va...
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...