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RTAS
2007
IEEE
15 years 4 months ago
Optimizing the FPGA Implementation of HRT Systems
The availability of programmable hardware devices with high density of logic elements and the possibility of implementing CPUs (called softcores) using a fraction of the FPGA area...
Marco Di Natale, Enrico Bini
JHSN
2006
267views more  JHSN 2006»
14 years 10 months ago
Client-side access control enforcement using trusted computing and PEI models
It has been recognized for some time that software alone does not provide an adequate foundation for building a high-assurance trusted platform. The emergence of industry-standard ...
Ravi S. Sandhu, Xinwen Zhang, Kumar Ranganathan, M...
ICDCS
2000
IEEE
15 years 2 months ago
On Low-Cost Error Containment and Recovery Methods for Guarded Software Upgrading
To assure dependable onboard evolution, we have developed a methodology called guarded software upgrading (GSU). In this paper, we focus on a low-cost approach to error containmen...
Ann T. Tai, Kam S. Tso, Leon Alkalai, Savio N. Cha...
CF
2005
ACM
14 years 12 months ago
Dynamic loop pipelining in data-driven architectures
Data-driven array architectures seem to be important alternatives for coarse-grained reconfigurable computing platforms. Their use has provided performance improvements over micro...
João M. P. Cardoso
ISCAS
2008
IEEE
119views Hardware» more  ISCAS 2008»
15 years 4 months ago
Adjusting the neurons models in neuromimetic ICs using the voltage-clamp technique
— This paper presents an original method to tune a neuromimetic IC based on neuron conductance-based models (Hodgkin-Huxley formalism). This method is well known in electrophysio...
Sylvain Saïghi, Laure Buhry, Yannick Bornat, ...