Sciweavers

1541 search results - page 216 / 309
» Software Hardware Co-Scheduling for Reconfigurable Computing...
Sort
View
SPAA
2009
ACM
16 years 4 months ago
NZTM: nonblocking zero-indirection transactional memory
This workshop paper reports work in progress on NZTM, a nonblocking, zero-indirection object-based hybrid transactional memory system. NZTM can execute transactions using best-eff...
Fuad Tabba, Mark Moir, James R. Goodman, Andrew W....
ISCA
2011
IEEE
270views Hardware» more  ISCA 2011»
14 years 7 months ago
Sampling + DMR: practical and low-overhead permanent fault detection
With technology scaling, manufacture-time and in-field permanent faults are becoming a fundamental problem. Multi-core architectures with spares can tolerate them by detecting an...
Shuou Nomura, Matthew D. Sinclair, Chen-Han Ho, Ve...
FTRTFT
1998
Springer
15 years 8 months ago
On the Need for Practical Formal Methods
A controversial issue in the formal methods community is the degree to which mathematical sophistication and theorem proving skills should be needed to apply a formal method. A fun...
Constance L. Heitmeyer
PPOPP
2003
ACM
15 years 9 months ago
Automated application-level checkpointing of MPI programs
Because of increasing hardware and software complexity, the running time of many computational science applications is now more than the mean-time-to-failure of highpeformance com...
Greg Bronevetsky, Daniel Marques, Keshav Pingali, ...
145
Voted
ANCS
2007
ACM
15 years 8 months ago
Compiling PCRE to FPGA for accelerating SNORT IDS
Deep Payload Inspection systems like SNORT and BRO utilize regular expression for their rules due to their high expressibility and compactness. The SNORT IDS system uses the PCRE ...
Abhishek Mitra, Walid A. Najjar, Laxmi N. Bhuyan