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ASAP
2009
IEEE
98views Hardware» more  ASAP 2009»
14 years 7 months ago
A Power-Scalable Switch-Based Multi-processor FFT
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
Bassam Jamil Mohd, Earl E. Swartzlander Jr.
IPPS
2010
IEEE
14 years 7 months ago
Efficient hardware support for the Partitioned Global Address Space
We present a novel architecture of a communication engine for non-coherent distributed shared memory systems. The shared memory is composed by a set of nodes exporting their memory...
Holger Fröning, Heiner Litz
ICCD
2007
IEEE
140views Hardware» more  ICCD 2007»
15 years 6 months ago
A low overhead hardware technique for software integrity and confidentiality
Software integrity and confidentiality play a central role in making embedded computer systems resilient to various malicious actions, such as software attacks; probing and tamper...
Austin Rogers, Milena Milenkovic, Aleksandar Milen...
FPL
2000
Springer
128views Hardware» more  FPL 2000»
15 years 1 months ago
Verification of Dynamically Reconfigurable Logic
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
David Robinson, Patrick Lysaght
TRIDENTCOM
2008
IEEE
15 years 4 months ago
DRIVE: a reconfigurable testbed for advanced vehicular services and communications
This paper introduces DRIVE, a reconfigurable demonstrator that will allow for experimental validation of vehicular networking research, as well as proof of concept and realistic ...
Carolina Pinart, Pilar Sanz, Iván Lequerica...