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ISCA
2000
IEEE
156views Hardware» more  ISCA 2000»
15 years 2 months ago
CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit
Reconfigurable hardware has the potential for significant performance improvements by providing support for application−specific operations. We report our experience with Chimae...
Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithv...
MAM
2007
157views more  MAM 2007»
14 years 9 months ago
Executing large algorithms on low-capacity FPGAs using flowpath partitioning and runtime reconfiguration
This paper describes a new method of executing a software program on an FPGA for embedded systems. Rather than combine reconfigurable logic with a microprocessor core, this method...
Darrin M. Hanna, Michael DuChene
ASAP
2007
IEEE
123views Hardware» more  ASAP 2007»
15 years 4 months ago
A memcpy Hardware Accelerator Solution for Non Cache-line Aligned Copies
In this paper, we present a hardware solution to perform non cache-line aligned memory copies allowing the commonly used memcpy function to cope with word copies. The main purpose...
Filipa Duarte, Stephan Wong
CLEIEJ
2007
90views more  CLEIEJ 2007»
14 years 9 months ago
Software - Implemented Self-healing System
The term “Self-healing” denotes the capability of a software system in dealing with bugs. Fault tolerance for dependable computing is to provide the specified service through ...
Goutam Kumar Saha
ICASSP
2011
IEEE
14 years 1 months ago
In-class demonstrations with a portable laboratory for teaching DSP to Computer Engineering majors
Given its pervasive use, and being a clear example of a computing system integrating hardware and software, Digital Signal Processing (DSP) is an important discipline in Computer ...
Andres Kwasinski