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AINA
2007
IEEE
15 years 3 months ago
Towards Device-Blending: Model and Challenges
This position paper proposes a device-blending architecture for aggregating device functionality via inter-device peer-topeer relationships, effectively forming a multi-device “...
Harinder Seera, Seng Wai Loke, Torab Torabi
DAC
1998
ACM
15 years 10 months ago
A Mixed Nodal-Mesh Formulation for Efficient Extraction and Passive Reduced-Order Modeling of 3D Interconnects
As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe...
Nuno Alexandre Marques, Mattan Kamon, Jacob White,...
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
15 years 2 months ago
Modeling and Evaluation of Substrate Noise Induced by Interconnects
Interconnects have deserved attention as a source of crosstalk to other interconnects, but have been ignored as a source of substrate noise. In this paper, we evaluate the importa...
Ferran Martorell, Diego Mateo, Xavier Aragon&egrav...
68
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ICPP
1999
IEEE
15 years 1 months ago
The Index-Permutation Graph Model for Hierarchical Interconnection Networks
In this paper, we present the index-permutation (IP) graph model, and apply it to the systematic development of efficient hierarchical networks. We derive several classes of inter...
Chi-Hsiang Yeh, Behrooz Parhami
SIGMETRICS
1990
ACM
129views Hardware» more  SIGMETRICS 1990»
15 years 1 months ago
An Analytical Model of Multistage Interconnection Networks
Multiprocessors require an interconnection network to connect processors with memory modules. The performance of the interconnection network can have a large effect upon overall s...
Darryl L. Willick, Derek L. Eager