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TCAD
2008
55views more  TCAD 2008»
14 years 9 months ago
Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process
Abstract--This paper presents a multiparameter momentmatching-based model order reduction technique for parameterized interconnect networks via a novel two-directional Arnoldi proc...
Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
15 years 3 months ago
Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction
Assessing IC manufacturing process fluctuations and their impacts on IC interconnect performance has become unavoidable for modern DSM designs. However, the construction of parame...
Peng Li, Frank Liu, Xin Li, Lawrence T. Pileggi, S...
ICCAD
2003
IEEE
141views Hardware» more  ICCAD 2003»
15 years 6 months ago
Passive Synthesis of Compact Frequency-Dependent Interconnect Models via Quadrature Spectral Rules
In this paper, we present a reduced order inodeling methodology, based on the utilization of optimal non-uniform grids generated by Gaussian spectral rules, for the direct passive...
Traianos Yioultsis, Anne Woo, Andreas C. Cangellar...
VLSID
2009
IEEE
144views VLSI» more  VLSID 2009»
15 years 10 months ago
Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications
The current paradigm of using Cu interconnects for on-chip global communication is rapidly becoming a serious performance bottleneck in ultra-deep submicron (UDSM) technologies. C...
Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi
HIPEAC
2005
Springer
15 years 3 months ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli