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ICCAD
2007
IEEE
115views Hardware» more  ICCAD 2007»
15 years 6 months ago
Parameterized model order reduction via a two-directional Arnoldi process
Abstract—This paper presents a multiparameter momentmatching based model order reduction technique for parameterized interconnect networks via a novel two-directional Arnoldi pro...
Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng
ICCAD
2006
IEEE
133views Hardware» more  ICCAD 2006»
15 years 6 months ago
Stable and compact inductance modeling of 3-D interconnect structures
Recent successful techniques for the efficient simulation of largescale interconnect models rely on the sparsification of the inverse of the inductance matrix L. While there are...
Hong Li, Venkataramanan Balakrishnan, Cheng-Kok Ko...
GLVLSI
2002
IEEE
118views VLSI» more  GLVLSI 2002»
15 years 2 months ago
Novel interconnect modeling by using high-order compact finite difference methods
— The high-order compact finite difference (HCFD) method is adapted for interconnect modeling. Based on the compact finite difference method, the HCFD method employs the Chebys...
Qinwei Xu, Pinaki Mazumder
ICCAD
2000
IEEE
88views Hardware» more  ICCAD 2000»
15 years 1 months ago
Hierarchical Interconnect Circuit Models
The increasing size of integrated systems combined with deep submicron physical modeling details creates an explosion in RLC interconnect modeling complexity of unmanageable propo...
Michael W. Beattie, Satrajit Gupta, Lawrence T. Pi...
TVLSI
2002
144views more  TVLSI 2002»
14 years 9 months ago
On-chip inductance cons and pros
Abstract--This paper provides a high level survey of the increasing effects of on-chip inductance. These effects are classified into desirable and nondesirable effects. Among the u...
Yehea I. Ismail