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ASPDAC
2008
ACM
101views Hardware» more  ASPDAC 2008»
14 years 11 months ago
Interconnect modeling for improved system-level design optimization
Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level...
Luca P. Carloni, Andrew B. Kahng, Swamy Muddu, Ale...
DATE
1999
IEEE
92views Hardware» more  DATE 1999»
15 years 1 months ago
Efficient Techniques for Modeling Chip-Level Interconnect, Substrate and Package Parasitics
Modern IC design requires accurate analysis and modeling of chip-level interconnect, the substrate and package parasitics. Traditional approaches for such analyses are computation...
Peter Feldmann, Sharad Kapur, David E. Long
ICCAD
1999
IEEE
101views Hardware» more  ICCAD 1999»
15 years 1 months ago
Efficient model reduction of interconnect via approximate system gramians
Krylov-subspace based methods for generating low-order models of complicated interconnect are extremely effective, but there is no optimality theory for the resulting models. Alte...
Jing-Rebecca Li, Jacob White
ICCAD
2001
IEEE
106views Hardware» more  ICCAD 2001»
15 years 6 months ago
Model Reduction of Variable-Geometry Interconnects using Variational Spectrally-Weighted Balanced Truncation
- This paper presents a spectrally-weighted balanced truncation technique for RLC interconnects, a technique needed when the interconnect circuit parameters change as a result of v...
Payam Heydari, Massoud Pedram
JCSS
2007
77views more  JCSS 2007»
14 years 9 months ago
A new approach to model virtual channels in interconnection networks
In this paper we present a new approach to model the effect of virtual channel multiplexing in high-speed interconnection networks. Previous studies have used a method proposed by...
Nasser Alzeidi, Ahmad Khonsari, Mohamed Ould-Khaou...