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ASPDAC
2009
ACM
114views Hardware» more  ASPDAC 2009»
15 years 2 months ago
Flexible and abstract communication and interconnect modeling for MPSoC
and Abstract CommunicationFlexible and Abstract CommunicationFlexible and Abstract CommunicationFlexible and Abstract Communication and Interconnect Modeling for MPSoCand Interconn...
Katalin Popovici, Ahmed Amine Jerraya
VLSID
2002
IEEE
91views VLSI» more  VLSID 2002»
15 years 9 months ago
Rational ABCD Modeling of High-Speed Interconnects
This paper introduces a new numerical approximation technique, called the Differential Quadrature Method (DQM), in order to derive the rational ABCD matrix representing the high-s...
Qinwei Xu, Pinaki Mazumder
DAC
1994
ACM
15 years 1 months ago
RC Interconnect Optimization Under the Elmore Delay Model
An e cient solution to the wire sizing problem WSP usingthe Elmoredelaymodelisproposed. Two formulations of the problem are put forth: in the rst, the minimum interconnect delay i...
Sachin S. Sapatnekar
74
Voted
ISQED
2005
IEEE
92views Hardware» more  ISQED 2005»
15 years 3 months ago
An Interconnect Insensitive Linear Time-Varying Driver Model for Static Timing Analysis
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
Chung-Kuan Tsai, Malgorzata Marek-Sadowska
ISQED
2006
IEEE
147views Hardware» more  ISQED 2006»
15 years 3 months ago
Compact Reduced Order Modeling for Multiple-Port Interconnects
— In this paper, we propose an efficient model order reduction (MOR) algorithm, called MTermMOR, for modeling interconnect circuits with large number of external ports. The prop...
Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng ...