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DELTA
2008
IEEE
15 years 8 months ago
Compact Models for Signal Transient and Crosstalk Noise of Coupled RLC Interconnect Lines with Ramp Inputs
Analytical compact form models for the signal transient and crosstalk noise of two-coupled RLC lines are developed. Capacitive and inductive coupling effects are investigated and ...
Taehoon Kim, Dongchul Kim, Jung-A Lee, Yungseon Eo
DAC
2002
ACM
16 years 2 months ago
Petri net modeling of gate and interconnect delays for power estimation
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Ashok K. Murugavel, N. Ranganathan
ISCAS
2003
IEEE
110views Hardware» more  ISCAS 2003»
15 years 6 months ago
Interconnect modeling and sensitivity analysis using adjoint networks reduction technique
An efficient model-order reduction technique for general RLC networks is proposed. The method is extended from the previous projection-base moment matching method with considerin...
Herng-Jer Lee, Chia-Chi Chu, Wu-Shiung Feng
DAC
2000
ACM
15 years 6 months ago
Passive model order reduction of multiport distributed interconnects
Signal integrity analysis has become imperative for high-speed designs. In this paper, we present a new technique to advance Krylov-space based passive model-reduction algorithms ...
Emad Gad, Anestis Dounavis, Michel S. Nakhla, Rama...