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ISPD
1998
ACM
88views Hardware» more  ISPD 1998»
15 years 5 months ago
An efficient technique for device and interconnect optimization in deep submicron designs
In this paper, we formulate a new class of optimization problem, named the general CH-posynomial program, and reveal the general dominance property. We propose an efcient algorith...
Jason Cong, Lei He
EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
15 years 5 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
HICSS
2009
IEEE
106views Biometrics» more  HICSS 2009»
15 years 8 months ago
A Radical Approach to Network-on-Chip Operating Systems
Operating systems were created to provide multiple tasks with access to scarce hardware resources like CPU, memory, or storage. Modern programmable hardware, however, may contain ...
Michael Engel, Olaf Spinczyk
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
15 years 7 months ago
Interconnect capacitance estimation for FPGAs
Abstract—The dynamic power consumed by a digital CMOS circuit is directly proportional to capacitance. In this paper, we consider pre-routing capacitance estimation for FPGAs and...
Jason Helge Anderson, Farid N. Najm
IADIS
2004
15 years 3 months ago
Business Environment Change and Service Platform Architecture Interconnection
There has been research on the areas of on-line and mobile service domains both in the business research discipline and the technology discipline. Some of the research has concent...
Kimmo Palletvuori