Sciweavers

9974 search results - page 79 / 1995
» Software Interconnection Models
Sort
View
ICCAD
2003
IEEE
119views Hardware» more  ICCAD 2003»
15 years 10 months ago
Analytical Bound for Unwanted Clock Skew due to Wire Width Variation
Under modern VLSI technology, process variations greatly affect circuit performance, especially clock skew which is very timing sensitive. Unwanted skew due to process variation f...
Anand Rajaram, Bing Lu, Wei Guo, Rabi N. Mahapatra...
FCCM
2007
IEEE
137views VLSI» more  FCCM 2007»
15 years 8 months ago
Rapid Prototyping of Large-scale Analog Circuits With Field Programmable Analog Array
— Modern advances in reconfigurable analog technologies are allowing field-programmable analog arrays (FPAAs) to dramatically grow in size, flexibility, and usefulness. This p...
I. Faik Baskaya, Brian Gestner, Christopher M. Twi...
ICCS
2009
Springer
15 years 8 months ago
A Holistic Approach for Performance Measurement and Analysis for Petascale Applications
Abstract. Contemporary high-end Terascale and Petascale systems are composed of hundreds of thousands of commodity multi-core processors interconnected with high-speed custom netwo...
Heike Jagode, Jack Dongarra, Sadaf R. Alam, Jeffre...
DDECS
2007
IEEE
105views Hardware» more  DDECS 2007»
15 years 8 months ago
Layout to Logic Defect Analysis for Hierarchical Test Generation
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
Maksim Jenihhin, Jaan Raik, Raimund Ubar, Witold A...
ADC
2005
Springer
106views Database» more  ADC 2005»
15 years 7 months ago
OS Support for a Commodity Database on PC clusters - Distributed Devices vs. Distributed File Systems
In this paper we attempt to parallelise a commodity database for OLAP on a cluster of commodity PCs by using a distributed high-performance storage subsystem. By parallelising the...
Felix Rauch, Thomas Stricker