Congestion estimation is an important issue for the success of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A...
In this paper, we for the rst time present experimental evidence that the die surface can act as an RC interconnect, becoming an important factor in determining the voltage of a o...
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...
Annie (Yujuan) Zeng, Kenneth Rose, Ronald J. Gutma...
To fully harness Grids, users or middlewares must have some knowledge on the topology of the platform interconnection network. As such knowledge is usually not available, one must ...
Lionel Eyraud-Dubois, Arnaud Legrand, Martin Quins...
Most approaches in reverse engineering literature generate a single view of a software system that restricts the scope of the reconstruction process. We propose an orchestrated se...