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LCTRTS
1998
Springer
15 years 4 months ago
Integrating Path and Timing Analysis Using Instruction-Level Simulation Techniques
Abstract. Previously published methods for estimation of the worstcase execution time on contemporary processors with complex pipelines and multi-level memory hierarchies result in...
Thomas Lundqvist, Per Stenström
ICPP
1997
IEEE
15 years 4 months ago
Automatic Parallelization and Scheduling of Programs on Multiprocessors using CASCH
r The lack of a versatile software tool for parallel program development has been one of the major obstacles for exploiting the potential of high-performance architectures. In this...
Ishfaq Ahmad, Yu-Kwong Kwok, Min-You Wu, Wei Shu
UIST
1997
ACM
15 years 4 months ago
An Interactive Visual Query Environment for Exploring Data
Direct manipulation of visualizations is a powerful technique for performing exploratory data operations such as navigation, aggregation, and filtering. Its immediacy facilitates ...
Mark Derthick, John Kolojejchick, Steven F. Roth
AUTONOMICS
2007
ACM
15 years 3 months ago
Facet: towards a smart camera network of mobile phones
Smart camera networks provide the opportunity to detect, classify, and trace visual events by means of a wireless network of embedded computing devices equipped with camera sensor...
Philipp Bolliger, Moritz Köhler, Kay Röm...
HOTOS
2009
IEEE
15 years 3 months ago
FlashVM: Revisiting the Virtual Memory Hierarchy
Flash memory is the largest change to storage in recent history. To date, most research has focused on integrating flash as persistent storage in file systems, with little emphasi...
Mohit Saxena, Michael M. Swift