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IPPS
2002
IEEE
15 years 11 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
MICRO
2002
IEEE
159views Hardware» more  MICRO 2002»
15 years 11 months ago
Master/slave speculative parallelization
Master/Slave Speculative Parallelization (MSSP) is an execution paradigm for improving the execution rate of sequential programs by parallelizing them speculatively for execution ...
Craig B. Zilles, Gurindar S. Sohi
NOMS
2002
IEEE
124views Communications» more  NOMS 2002»
15 years 11 months ago
A framework for building reusable mobile agents for network management
Mobile agents can migrate among nodes to perform a set of management tasks at each of the visited nodes. Existing mobile agent-based network management systems often assume that t...
Ichiro Satoh
202
Voted
ICA3PP
2010
Springer
15 years 11 months ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
DAC
2009
ACM
15 years 11 months ago
Heterogeneous code cache: using scratchpad and main memory in dynamic binary translators
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...
José Baiocchi, Bruce R. Childers
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