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TPDS
2010
174views more  TPDS 2010»
15 years 4 months ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
INFSOF
2010
173views more  INFSOF 2010»
15 years 3 months ago
Filtering false alarms of buffer overflow analysis using SMT solvers
Buffer overflow detection using static analysis can provide a powerful tool for software ers to find difficult bugs in C programs. Sound static analysis based on abstract interpre...
Youil Kim, Jooyong Lee, Hwansoo Han, Kwang-Moo Cho...
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
14 years 10 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
ASPLOS
2011
ACM
14 years 10 months ago
Hardware acceleration of transactional memory on commodity systems
The adoption of transactional memory is hindered by the high overhead of software transactional memory and the intrusive design changes required by previously proposed TM hardware...
Jared Casper, Tayo Oguntebi, Sungpack Hong, Nathan...
CCS
2011
ACM
14 years 6 months ago
Eliminating the hypervisor attack surface for a more secure cloud
Cloud computing is quickly becoming the platform of choice for many web services. Virtualization is the key underlying technology enabling cloud providers to host services for a l...
Jakub Szefer, Eric Keller, Ruby B. Lee, Jennifer R...
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