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IEEEPACT
2006
IEEE
15 years 11 months ago
Branch predictor guided instruction decoding
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
Oliverio J. Santana, Ayose Falcón, Alex Ram...
ISCAS
2006
IEEE
113views Hardware» more  ISCAS 2006»
15 years 11 months ago
High speed routing lookup IC design for IPv6
— With the growth of Internet users and services, the IP address has been exhausted. In order to solve this problem, the short term solution was presented, i.e., CIDR (Classless ...
Yuan-Sun Chu, Hui-Kai Su, Po-Feng Lin, Ming-Jen Ch...
MICRO
2006
IEEE
103views Hardware» more  MICRO 2006»
15 years 11 months ago
NoSQ: Store-Load Communication without a Store Queue
This paper presents NoSQ (short for No Store Queue), a microarchitecture that performs store-load communication without a store queue and without executing stores in the outof-ord...
Tingting Sha, Milo M. K. Martin, Amir Roth
TRIDENTCOM
2006
IEEE
15 years 11 months ago
CMT II: An agent based framework for comprehensive IP measurements
— The Communication Measurement Tool II (CMT II) is a framework for comprehensive IP measurements. It is the next development stage of the succeeded measurement framework called ...
Thomas Pfeiffenberger, Thomas Fichtel
ISPD
2006
ACM
108views Hardware» more  ISPD 2006»
15 years 10 months ago
Statistical clock tree routing for robustness to process variations
Advances in VLSI technology make clock skew more susceptible to process variations. Notwithstanding efficient zero skew routing algorithms, clock skew still limits post-manufactu...
Uday Padmanabhan, Janet Meiling Wang, Jiang Hu
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